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A lot of details about the Tensor G5 are still undisclosed by Google. However, leaks suggested that it would be mass-produced using TSMC’s second-generation 3nm process (N3E), which is one generation behind competitors scheduled to unveil their chips with newer lithography technologies.
Recently, a report revealed that Google is actually two steps ahead of its rivals. The Tensor G5 is fabricated on TSMC’s latest and most advanced 3nm ‘N3P’ technology, also known as the third-generation process.
No Specific Details Have Been Divulged; Claims Tensor G5 Utilizes TSMC’s Leading 3nm Process
The exact details of the Tensor G5 are slowly being revealed as Google prepares to launch its Pixel 10 series. However, an interesting claim made by Tom’s Hardware is that Google’s latest SoC uses TSMC’s 3nm N3P technology. Whether this information comes from exclusive sources or not, Google’s official announcement page does not explicitly mention the manufacturing process but states that it utilizes a leading node.
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“Enhancements across Tensor G5 include an up to 60% more powerful TPU and 34% faster on average CPU, making your Pixel more responsive for everyday use. Tensor G5 is designed in the leading 3nm process node from TSMC—a manufacturing technology that allows us to pack more transistors into the chip so it’s more powerful and efficient.”
The 3nm N3P process is an optical shrink of the N3E node, offering a 5% performance boost at the same power consumption. Alternatively, chips fabricated on this technology can achieve 5-10% improvement in energy savings at the same frequency, which could slightly increase battery life and reduce internal hardware overheating.
This claim awaits confirmation, so treat this information with caution. We will provide more updates as they become available.
